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F4PGA Verilog to XML (V2X) 0.0-618-g413dc27 documentation Multiple clocks

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F4PGA Verilog to XML (V2X) 0.0-618-g413dc27 documentation
Examples
Clock

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F4PGA Verilog to XML (V2X) 0.0-618-g413dc27 documentation

chipsalliance/f4pga-v2x

Examples

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Multiple clocks¶

Set inputs as clock by name (multiple clock inputs)
Set outputs as clock by name (multiple clock outputs)

Previous Set output as clock by name (clk)

Next Set inputs as clock by name (multiple clock inputs)

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