Examples ======== Here we have examples on how v2x converts a Verilog module to its corresponding model.xml and pb_type.xml files. These examples are taken from the `v2x test cases `_. .. toctree:: clock_mux/README.rst clocks/README.rst dsp/README.rst gates/README.rst no_seq/README.rst pack_pattern/README.rst vtr/README.rst